2024.12.04

MediaTek MT8797 5G chip datasheet

The Mdiatek MT8797 (see Figure 1-1) integrates Bluetooth, FM, WLAN, and GPS modules and is a highly integrated baseband platform that integrates both modem and application processing subsystems to enable LTE/LTE-A/NR and C2K tablet applications. The chip integrates four ARM® Cortex-A78 cores operating at up to 2.6GHz, four ARM® Cortex-A55 cores operating at up to 2.0GHz, and a powerful multi-standard video codec. In addition, an extensive set of interfaces and connectivity peripherals are included to connect cameras, touchscreen displays, and UFS/MMC/SD cards.

Figure 1-1. Advanced MT8797 functional block diagram

The application processor is a multi-core ARM® Cortex-A78 and ARM® Cortex-A55 equipped with a NEON engine, providing the necessary processing power to support the latest OpenOS and its demanding applications such as web browsing, email, GPS navigation, and gaming. All of this is viewed on a high-resolution touchscreen display, and the graphics are enhanced by 2D and 3D graphics acceleration. Multi-standard video accelerators and advanced audio subsystems are also integrated to deliver advanced multimedia applications and services, such as streaming audio and video, with numerous decoders and encoders. The combination of high-performance CPU, DSP, and hardware coprocessor provides a powerful modem subsystem capable of supporting NR Sub6, LTE Cat 18, Category 24 HSDPA downlink and Category 7 HSUPA uplink data rates, Category 14 TD-HSDPA downlink and Category 6 TD-HSUPA uplink, and Category 12 GPRS, EDGE. The MT8797 also embodies Wireless Communication devices, including WLAN, Bluetooth, and GPS. The MT8797 integrates four advanced radio technologies into a single chip, providing the industry's best and most convenient connectivity solution. Overall quality gains are achieved when voice, data, and audio/video are transmitted simultaneously on mobile phones and media tablets. The small footprint and low power consumption greatly reduce the PCB layout resources.

1.1 MT8797 Integrated Highlighting Function  4Arm®Cortex-A78 core running at 2.6 GHz  4ARM®Cortex-A55 core running at 2.0 GHz  LPDDR4X up to 16 GB (four channels with 16-bit data bus width)  Memory data rate up to LPDDR4X-4266 LTECAT-18 4×4 MIMO  NR SUB6 2CC and 200 MHz BW  Embedded connectivity systems, including WLAN/BT/FM/GPS  Resolution up to QHD+ (1,440*3,360) OpenGLES 3.2 3D graphics accelerator  ISP supports 64MP@24 fps/108 MP capture  AV14K@60 fps decoder  HEVC4K@60 fps decoder  HEVC4K@60 FPS encoder  Voice codecs (FR, HR, EFR, AMR FR, AMR HR and Wide-Band AMR and EVS_WB)

1.2 Platform Features  General  Tablet, 2 MCU subsystem architecture  Support eMMC/UFS boots  Support LPDDR4X  APMCU subsystem  4ARM®2.6GHz Cortex-A78 cores with 64 kb L1 I-CACHE, 64 KB L1 DCACHE and 256 KB L2 CACE per core  4ARM®2.0GHz Cortex-A55 cores with 32 kb L1 I-CACHE, 32 kb L1 DCACHE and 128 KB L2 CACE per core  Shared 2 MB L3 cache  Neon multimedia processing engine with SIMDV2/VFPV4 ISA support DVFS technology has adaptive operating voltage from 0.6V to 1.0V  Programmable Vision Processor Unit (VPU) supports AI and CV  Top Performance: Fix 8: Up to 639 GMAC; FIX16: up to 160 GMAC; FP16: Up to 80 GMAC, FP32: up to 40 GMACS  Binary core supports multiple applications at the same time  VFPU supports applications that require high accuracy  AI Accelerator (AIA) (Deep Tilt Accelerator: DLA) supports high compute requirements for NN applications  Top performance: FIX8 1741 GMACS, FIX 16819 GMACS, FP16 436 GMACS  Simultaneous use of the HW function blocks of the pipeline (CORV/ACT/POM/EWE/BILIRINEAR)  Support Android NN asymmetric quantization data format  Support weight compression to reduce DRAM BW

 Memory subsystem in apusys  1MB TCM as second-level data memory EDMA reduces additional data transfer time  MDMCU subsystem  High-performance multi-core and multi-threaded processor architecture  High-performance AXI bus interface  Universal DMA engine and dedicated DMA channel for peripheral data transmission  Clock gated controlled power management  MD external interface  Pair two SIM/USIM interfaces  Interface pins with RF and radio-related peripherals (antenna tuners, PAs, etc.).  Security  Arm®Trustzone® security  External memory interface LPDDR4x up to 16 GB (4 channels with 16-bit data bus width)  Memory data rates up to LPDDR4X-4266  Self-replication/partial self-refresh mode  Low power operation Programmable return rate of the I/O pads of the memory controller  Dual-level memory device  Advanced bandwidth quorum control


 Peripherals  USB A port with USB 3.0 device mode or USB 2.0 OTG mode Emmc5.1 UFS 3.1  2 UARTS for debugging and application  8 SPI Masters for external devices